July 14, 2018
The “3rd National FPGA Design Competition 2018”has been concluded with the grand success today at Kathford International College of Engineering & Management, Balkumari, Lalitpur. The competition was jointly organized by Kathford International College of Engineering & Management, Digitronix Nepal Pvt. Ltd and LogicTronix.
The principal aim of the competition is to promote electronic hardware design based on FPGA [An Reconfigurable Chip Technology] in Nepal. This Competition is the continuation of the “Second All Nepal FPGA Design Competition 2017” which was held on July 15, 2017, at Kathford Intl’ College of Engineering and Management and “First FPGA Design Competition 2016” held at July 2. 2016 at IOE Pulchowk Campus.
FPGA, a short form for Field Programmable Gate Array, is a programmable chips technology widely used in hardware systems such as mobile phones, cars to applications in space missions. FPGA technology is fast becoming one of the market leaders in hardware system design around the world. The world’s top universities such as Harvard, MIT and Stanford have a vast scale research group doing their research based on FPGA. The competition hopes to lay a foundation of FPGA research in Nepal by enhancing the FPGA application development skills and encouraging engineering students to do their projects on FPGA.
In the competition the total participant teams are 10, the winner of this contest is Arjun Neupane from Nepal Engineering College with the project – “16-bit Microprocessor Design, Simulation, and Implementation”, was awarded a cash prize of NRs. 15,000. The first runner-up, Ms. Shweta Chaudhary, Kala Raut, and IchchhaRauniyar from Khwopa Engineering Campus with the project traffic light design and prototype for BaneshowrChowk, and the second runner-up, Mr. Subash Pandey from IOE Thapathali Campus with the project Vehicle Number Plate Recognition, received Rs. 7,000 and Rs. 4000 respectively.
The award winners will get an opportunity to receive training on Xilinx Zynq FPGA development board and Internship on FPGA research and development at Digitronix Nepal. The competition also receives a request from the international participant’s from Indian Institute of Technology (IIT)-India & some university students from the USA, in the upcoming competition organizer will also include those global request for the participation on FPGA Design Competition.
An advisor of this event Mr. Deepesh Man Shakya, a Xilinx FPGA Engineer, said this 3rd edition of FPGA Design Competition is a significant milestone in introducing and enhancing FPGA education in Nepal Country and provide a platform for creating FPGA based research and development centers. Mr. Shakya said such initiatives could potentially turn into a design house providing hi-tech engineering jobs to many aspiring engineers within the country.
Dr. Madhusudan Kayastha, Principal of Kathford International College of Engineering and Management, suggested to the participant for preparing research papers and articles which will help then for further courier. The coordinator of this competition Mr. Krishna Gaihre from Digitronix Nepal & LogicTronix said that there had been considerable interest from engineering students towards FPGA R&D.
Digitronix Nepal is currently focused on research, development& training of hardware designs based on FPGA. Digitronix Nepal also believes that within a few years it will create 10s of opportunities for Nepalese Engineering Graduates on the field of FPGA Design & VLSI Design.
The chief guest at the event Prof. Dr. Dinesh Kumar Sharma from IOE Pulchowk Campus lauded the event organizers and supporters for the effort they have put and also expressed his support in adopting FPGA in the mainstream engineering courses and help develop FPGA research environment in engineering colleges in Nepal.